Why is it called Front Side Bus?

[freddy]

My boss asks me today why is it referred to as Front Side Bus, Can someone give me a good explanition as to why it is referred to as "Front" Side bus? CPU buss speed right.

[dawgtuff]

Yep,right answer.Also,Mobo's have a FSB.

[freddy]

Thankz dawg but the question was WHY Front, if i'm right before the "100mhz buss" it was referred to as plain old "buss speed"

[Underclocked]

Assumpton on my part, but Front Side implies to me the part that comes before the clock multiplier. Were the downstream result given a similar name it would be Back Side.
Now, wouldn't that be special? http://www.sysopt.com/forum/wink.gif

[Gene C.]

lets see. is it because most cities lay the sidewalks on the front side of the bus. or
it would cost to much to put steps at the back of the bus besides on the side so people could load from the back side bus plus the front side bus to to save time. just couldn't turn this one down. sorry

Quoted from the what is site.
frontside bus and backside bus

In a personal computer with an Intel processor chipset that includes a Dual Independent Bus (DIB), the frontside bus is the data path and physical interface between the processor and the main memory (RAM). The backside bus is the data path and physical interface between the processor and the L2 cache memory. Both the frontside bus and the backside bus can be in use at the same time, meaning that the processor gets more done in a given number of clock cycles.

Prior to Intel's Pentium Pro processor, both the L2 cache and RAM were accessed using the same bus, creating an occasional bottleneck and reducing the overall throughput of the computer. Beginning with the Pentium Pro, the level-2 (L2 cache) is packaged on the same module or chipset as the processor. Intel's Dual Independent Bus (DIB) design separates and coordinates accesses between the processor and RAM and accesses between the processor and the L2 cache. The frontside bus operates at 66 or 100 MHz, depending on the chipset. In the Pentium Pro, the backside bus (to the L2 cache) operates at the same clock speed as the processor. In the Pentium II, the backside bus operates at one-half the processor clock speed

[Underclocked]

Gene, I guess it is 'special'. http://www.sysopt.com/forum/wink.gif Never have heard it referenced as such, but it does make sense. (as much as anything I guess)

[Amarok]

Ya beat me to it Gene, was going to post the same thing. But for anyone who does not know what whatis is.
www.whatis.com (http://www.whatis.com)

Great site for technical explanations.

[freddy]

Thanks Gene that is the type of answer I was looking for. "The correct one"