Why is memory performance so much less than theoretical?

[Dputiger]

That's my question: Even on the best chipsets with the best memory controllers, performance never hits that theoretical possibility. Why?

[OuTpaTienT]

I think because when you're talking theoretical limits you're talking the single best case scenerio, which even in ideal conditions rarely happens.

For example, a stick of 128mb of memory would yield it's best performance by being loaded with 128mb of data in one continuous stream and then reading the data back as one unit. Yet in the real world data is being read from & copied to memory in very small segments on a continual basis.

I always love auto anologies so imagine you have a Lamborghini with a top speed of 220mph. You might get close to that speed on a vast open highway. But realistically, you'll be running back & forth to Qwik-stop and picking the kids up from school...and you'll probably never even see 100mph much less 220mph. (and you shouldn't be driving that fast with kids in the car anyways. http://sysopt.earthweb.com/forum/wink.gif)


[This message has been edited by OuTpaTienT (edited 02-01-2001).]

[RobRich]

Other important issues: interleaving, latency (big time issue!), wait states, purge/write/read/random/linear/etc... instruction execution commands (processor dependant), advanced software commands (often compiler based), sync/async access paths, and countless other issues.

I recommend checking out some of the information in this thread at Aces for a few more ideas:

http://www.aceshardware.com/board/general/read.php?message_id=25010302

Catch ya' later,
Robert Richmond